BRN Discussion Ongoing

Since when was/is DRO admitted to the ASX300?
March rebalance.
Edit - this is for DRO's inclusion into the All Ords, not ASX300.

20240304_152958.jpg


It's supposed to be effective from the 18th of March, but some getting in early..

Since they are in such a strong position, these shorts are probably more likely to be pushing the price down, for when they have to balance their funds and the price may rise on actual inclusion.
 
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Teach22

Regular
Just to clarify.
There is a difference between ASX200, ASX300 and All Ords.
WBT will be removed from the ASX200 but is still in the ASX300.
DRO will be added to the All Ords, not the ASX300
 
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Just to clarify.
There is a difference between ASX200, ASX300 and All Ords.
WBT will be removed from the ASX200 but is still in the ASX300.
DRO will be added to the All Ords, not the ASX300
"DRO will be added to the All Ords, not the ASX300"
Edit - I read the rebalance incorrectly.

Man you're smarter than that..
I'm pretty sure the All Ords, represents pretty much everything?

Edit..
What is the difference between the S&P/ASX 200 and the All Ordinaries? The S&P/ASX 200 index is rebalanced every quarter and has a set minimum market capitalisation and liquidity requirement. The All Ordinaries index is rebalanced annually and consists of the 500 largest ASX listed stocks by market capitalisation.

Read the March quarterly rebalance announcement.
Edit - He read it better than me.
 
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Teach22

Regular
"DRO will be added to the All Ords, not the ASX300"

Man you're smarter than that..
I'm pretty sure the All Ords, represents pretty much everything?

Read the March quarterly rebalance announcement.

All Ords is, I believe, the top 500 companies.
 
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All Ords is, I believe, the top 500 companies.
Yes you are correct, it was their entry into the All Ords, not ASX300.

I will edit my previous posts 👍

I apologise to you 👍
 
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7für7

Top 20
I’m so glad this forum is all about BRN 🙋🏻‍♂️
 
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wilzy123

Founding Member
Maybe tell your friend to follow their own advice. Frankly, if they can't be more generous and less of a narcissist, if they can't be slightly distracted by the improving SP, then move on. Why do they want to target individual contributors anyway?

At least you're consistent

72884c7f98149bd422e488510277f2b0b9-20-dumpster-fire.rsquare.w700.gif
 
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Boab

I wish I could paint like Vincent
In an article in the Weekend Australian it was reported that a group of Australian investors from James Packers CPH to Macquarrie had amassed a combined $US10Bn ($15.4Bn AUD) holding in Nvidia.
Using this forums 1% rule 15,400,000,000 div by 100 = 154,000,000 @40c/share is 385,000,000 shares.
It's easy to see how these institutional buyers can amass huge amounts of shares for what appears to be a tiny part of their portfolio.
On top of all the news that we know about it will only take one decent ASX announcement to put a rocket under this share price and all the faithful retail holders will be handsomely rewarded.
GLTA
Cheers
 
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mrgds

Regular
THANKS @Bravo ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,Job well done today !!!!!

You deserve this well earned cat-nap ..........................................(y)

Screenshot (81).png



Just make sure your up and at em again tomorrow !



BTW ............ any notice the XT after the auction of nearly 1.8million @ .435 ? :eek:;)

AKIDA BALLISTA
 
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Sirod69

bavarian girl ;-)

Easing automotive software migration: From discrete ECUs to Zonal Controllers in emerging EE architectures​


....

One way to achieve FFI is by sandboxing each software component into virtual machines isolated by a separation kernel. Armv8-R supports this feature by means of real-time virtualization. Through using a hypervisor, or simpler separation kernel, on Armv8-R based processors, like Cortex-R52 and Cortex-R52+, it is possible to achieve FFI among multiple software workloads.

Therefore, Cortex-R52 and Cortex-R52+ processors offer an ideal platform for building zonal controllers that can be useful for deploying multiple software workloads, which are currently running on discrete ECUs, many of which are based on Arm Cortex-M processors. For more information on virtualization supported by Armv8-R, please refer to the Best Practices for Armv8-R Cortex-R52+ Software Consolidation.
1709537042231.png

 
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Rach2512

Regular
Wowzers!
 

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Teach22

Regular
This is the Prophesee patent for combining the DVS with frame camera.

US2022329771A1 METHOD OF PIXEL-BY-PIXEL REGISTRATION OF AN EVENT CAMERA TO A FRAME CAMERA 20210402

View attachment 58399

A method for registering pixels provided in a pixel event stream comprising:
acquiring image frames from a frame-based camera, each image frame being generated using an exposure period;
generating a first point matrix from one or more of the image frames, the first point matrix being associated with an acquisition period of the image frames;
acquiring a pixel event stream generated during the acquisition period;
generating a second point matrix from pixel events of the pixel event stream, occurring during the acquisition period of the first point matrix;
computing a correlation scoring function applied to at least a part of the points of the first and second point matrices, and
estimating respective positions of points of the second point matrix in the first point matrix, due to depths of the points of the first point matrix related to the second point matrix, by maximizing the correlation scoring function
.


FIG. 4 depicts the exposure timings of a vertical rolling shutter sensor. Each row R 0 , R 1 , . . . , Rn of pixels of the rolling shutter sensor is exposed during an exposure period of the same duration Tr, shown in FIG. 4 by a rectangle RE. The start of exposure period RE of each row R 0 -Rn is offset by the rolling shutter skew Rs compared to the previous row, In contrast, the exposure periods of the pixel rows in a global shutter sensor are all identical, as shown in FIG. 4 by a single central rectangle GE. The duration T of the exposure period of the global shutter sensor may be the same as or different from the duration Tr of the row exposure periods.

If the sensor has a vertical rolling shutter starting from top to bottom, and the y coordinate varies from 0 (top of the sensor) to height-1 (bottom or last row of the sensor), function Es(x,y) can be computed as Es(x,y)=ts+y·Rs. Function Es(x,y) has a same value for all pixels lying on the same row.

Function Ee(x,y) can be computed as Ee(x,y)=Es(x,y)+Tr, where Tr is the duration of the exposure period of one row of image I. Alternatively, function Ee can also be computed as Ee(x,y)=te+y·Rs, to being the time of the end of the exposure period at the first row of the frame I.

It can be observed that the point matrix J is defined only for points corresponding to pixel events occurring during the exposure period T. The other points are undefined and may be set to any arbitrary value, for example 0 or the value of the nearest defined point
.
Hi Dodgy,

There were previously one or two posters who were convinced (and maybe still are) that Brainchip were somehow involved with the Qualcomm/Snapdragon thing.

There’s a lot of talk around the Prophesee/Qualcomm collaboration at present and our association with Prophesee have a lot of holders thinking it is related to BRN.
Your above post, whilst looking very impressive, doesn’t help someone like me to understand whether or not Akida is being used by Prophesee.
Could I ask your opinion on this?

Thanks.
 
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Terroni2105

Founding Member
View attachment 58416

it is fantastic to see our BrainChip employee giving BrainChip a moment in the spotlight.
I think this is exactly what the Brainchip official account should be doing, putting it out there, posting with pride. Where are they?
 
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7für7

Top 20
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Sirod69

bavarian girl ;-)
We have a new employee at Brainchip🥰😘

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Kurt Manninen​


Senior Solutions Architect at Brainchip, Inc

Info

I am a Senior Solutions Architect at Brainchip, Inc. I work directly with Brainchip's current and future customers to help them utilize Brainchip's Akida Neuromorphic System-on-Chip to solve problems for computer vision (classification, object detection) , audio processing (keyword spotting), sensor fusion, and anomaly detection.
 
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Yep, was quiet, to me anyway.

Wasn't GML considered and early competitor at one stage, or for that wrong?


Grai Matter Labs quietly snapped up by Snap​

Nieke Roos
22 February

Last October, neuromorphic computing company Grai Matter Labs (GML) was acquired by Snap, the American developer of the instant messaging app Snapchat. Headquartered in Paris with offices in Eindhoven and Silicon Valley (San Jose), GML is working on a full-stack AI system-on-chip platform. The takeover didn’t receive much publicity except for a couple of mentions in French media, tracing back to an original article by the economic investigation site L’Informé. It appears that Snap considers it a confidential matter. According to L’Informé, GML was driven into American arms because it couldn’t find funding in Europe.
 
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