Baya Systems, the company our former CMO Nandan Nayampally now works for as CCO, emerged from stealth mode today.
Chairman of the Board is Tenstorrent’s CEO Jim Keller.
Baya Systems has emerged from stealth with an interconnect tool for chiplet and complex system on chip (SoC) designs.
www.eenewseurope.com
Baya Systems emerges from stealth with chiplet interconnect
Technology News | June 20, 2024
By Nick Flaherty
Baya Systems has emerged from stealth with an interconnect tool for chiplet and complex system on chip (SoC) designs.
“What we feel we bring to the table is a more software driven development process,” Nandan Nayampally, chief commercial officer of Baya Systems tells
eeNews Europe. “We consider this to be the first really focussed fabric for AI.”
The company has executive from Intel, Netspeed Systems, ARM, Brainchip, AMD and Nuvia and is chaired by microprocessor expert Jim Keller, who is also CEO of AI chip developer Tenstorrent. It is backed by Matrix and Intel Capital.
“We focus on the data driven generation of IP with both static and dynamic microarchitectural analysis at runtime,” said Nayampally. “When you do complex systems, the devil is in the detail and system fabric is not that easy.”
The WeaveIP provides components to build a unified fabric that has an efficient, scalable transport architecture that maximizes performance and throughput, while minimizing latency, silicon footprint and power. This supports standard protocols such as CHI, ACE5-Lite, AXI5 and extendable to others including CXL.
The WeaverPro tool supports the SoC designer from initial specification all the way to post-silicon tuning. This uses the WeaveIP to produce a unified mesh fabric approach to generating layer protocols on top of the fabric without the need for gaskets that translate the protocols and the bottlenecks that come with this and slow down the performance.
“The transport is common so you can customise that for the QoS or debug protocols and build protocols on top.”
This comes from the software-driven analysis of the design that can configure up to eight virtual channels across the chip at runtime.
“What we do with our software is very efficient cache memory analysis, get accurate partitioning and caching, and a fabric component that generates a correct by construction physical design. We have two main flavours, where you can define your own protocol and one with multicast for AI designs,” he said.
“We can optimise the bandwidth and reduce the wires and logic to use those wires efficiently for optimising for latency and bandwidth, with up to 3GHz in a 4nm process.”
The fabric is customisable at runtime with APIs so you can tune the parameters for efficiency. “In general the flexibility we have put in helps overall with the reduction in silicon footprint and power and that comes from having an accurate understanding of the data movement,” he said.
The fabric is designed for inside the chip and the chiplet, and Baya will work with interconnect schemes such as Eliyan’s Bunch of Wires and UCIe.
“We stop at the die boundaries but what we end up doing outside of that is the software understands chiplet boundaries and can optimise across chiplet boundaries. So it’s a chiplet-ready network, as various things need to be built into the network to make it easier to use in chiplets,” he said.
“Our first partner is Blue Cheetah. They do the link layers, and once we understand their wires we can optimise and allow API tuning in the future as well,” said Nayampally
“The semiconductor industry is at an inflection point in how to overcome the widening gap between memory performance and the processing needs of AI,” said Dr. Sailesh Kumar, CEO at Baya Systems.
“These challenges are overwhelming the industry with design complexity, energy costs, and systems that are obsolete by the time they hit the market. Baya Systems is resolute in delivering foundational software, an industry-first, grounds-up fabric solution for future-proof multi-cluster and multi-chiplet designs, and a methodology that takes out the guesswork. I firmly believe that Baya unlocks the merchant chiplet market that is expected to grow to $107 billion by 2033.”
www.bayasystems.com
Baya Systems Introduces New Technology to Transform and Accelerate Intelligent Computing Software and IP addresses system design complexity, performance, scalability and Time to Market of SoCs and chiplets for emerging applications. Santa Clara, CALIF. – June 20, 2024 – Baya Systems today...
bayasystems.com
Go to...
Baya Systems Introduces New Technology to Transform and Accelerate Intelligent Computing
Software and IP addresses system design complexity, performance, scalability and Time to Market of SoCs and chiplets for emerging applications.
Santa Clara, CALIF. – June 20, 2024 –
Baya Systems today emerged from stealth mode to announce its software-driven IP technology portfolio designed to accelerate complex single-die and multi-die SoC designs. These innovations bolster the emerging chiplet economy and enable unprecedented scale for large-scale compute and AI processing.
Baya Systems technology simplifies the development process and reduces the risk, empowering designers to rapidly analyze, develop, optimize and deploy these complex systems. This enables highly energy-efficient data movement in single-die designs that can support over 4 terabyte/second throughput in a complex CPU cluster, culminating in multi-petabyte/second throughput in multi-chiplet designs for high-end AI installations.
With the exponential growth of computing requirements for artificial intelligence, best-in-class silicon vendors have consistently tried to scale performance efficiently by integrating various processors, including CPUs, GPUs, and neural network accelerators, into intelligent compute systems. This has led to a substantial challenge of efficient data movement across these different processors, and increasingly complex system and application software development. Baya Systems focuses on delivering hyper-efficient data movement that can be customized with efficient hardware-based coherency, correctness, and robustness to accelerate these platforms for applications across industries such as AI acceleration, data center, networking infrastructure, automotive and IoT.
“The rapid scaling in compute needed to support AI is bottlenecked by scaling silicon, memory, storage, and the increasingly huge amounts of data; requiring increasingly complex SoCs and chiplets,” said Kevin Krewell, Principal Analyst at TIRIAS Research. “The industry desperately needs a holistic way to design, analyze, and build intelligent fabrics to address this, and Baya seems to have the right ingredients to really drive the market forward.”
Baya Systems tackles the challenges of system design complexity, performance guarantees, high costs, and shrinking market windows in the SoC and chiplet industries. Its WeaverPro™ software platform supports the SoC designer from initial specification all the way to post-silicon tuning. Its WeaveIP™ provides components to build a unified fabric that has an extremely efficient, scalable transport architecture that maximizes performance and throughput, while minimizing latency, silicon footprint and power. Combined with advanced features for reliability and safety, this empowers designers to analyze, architect, customize, optimize and deploy complex SoCs and chiplets.
Baya’s solution is unique for the following reasons:
- Software-driven architecture exploration helps optimize design to achieve performance guarantees based on built-simulator.
- Engine to generate representative workloads from traffic specification.
- Best-in-class, flexible network that can achieve 3GHz in a 4-nanometer process technology.
- Algorithmic optimization that supports reuse and minimizes silicon and power footprints without compromising performance.
- Industry’s first IP to offer multi-level cache coherency for single/multi-die systems, radically reducing costs of coherency across these large-scale systems.
- Customizable protocol and multicast capabilities for advanced AI and CPU acceleration that support petabyte-level throughput.
- Correct-by-construction design generation that radically reduces risk of failure.
- WeaveIP supports standard protocols such as CHI, ACE5-Lite, AXI5 and extendable to others including CXL.
- Physically aware flow with modularity and tiling support for ease of implementation
“The semiconductor industry is at an inflection point in how to overcome the widening gap between memory performance and the processing needs of AI,” said Dr. Sailesh Kumar, CEO at Baya Systems. “These challenges are overwhelming the industry with design complexity, energy costs, and systems that are obsolete by the time they hit the market. Baya Systems is resolute in delivering foundational software, an industry-first, grounds-up fabric solution for future-proof multi-cluster and multi-chiplet designs, and a methodology that takes out the guesswork. I firmly believe that Baya unlocks the merchant chiplet market that is expected to grow to $107 billion by 2033.”
Baya Systems was founded by Kumar, an ex-Intel Fellow and former founder of Netspeed Systems; Dr. Eric Norige, and Joji Philip, who were also key contributors at Netspeed Systems. It is backed by leading investors Matrix and
Intel Capital, and is led by Silicon Valley semiconductor veterans with extensive experience in processing and systems, who have driven important initiatives at AMD, ARM, Apple, Intel, Meta, and other leading processor companies.
“When we invest, we look for key market gaps, disruptive technologies that address them, and teams that have a compelling vision and execution muscle and the hunger to achieve it,” said Stan Reiss, general partner, Matrix Partners. “Baya tops all of them for a market that is desperate for solving the scale and chiplet problem with a technology that not just fills the gap but unleashes disruptive innovation, and a proven team that has had a consistent out-sized success in entrepreneurial and high-growth settings.”
The company makes its public debut at
DAC 2024, Booth No. 2446, at Moscone West in San Francisco June 23-27.
About Baya Systems
Baya Systems is accelerating the next wave of foundational chiplet-based, high-performance and modular semiconductor systems technologies to accelerate intelligent compute everywhere. Baya Systems was named for the Baya bird, aka the weaver, renowned for constructing cohesive nests from various materials. This approach mirrors Baya Systems’ integrated and efficient solutions from diverse components, and its mission to allow best-of-breed compute, communication and I/O components to be used together with the promise of improving performance, yield, reusability/composability and cost of development. Baya Systems is backed by leading investors Matrix Partners and Intel Capital. For more information visit
https://bayasystems.com.
brainchip.com
.
